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| TS27M2C,I,M PRECISION LOW POWER CMOS DUAL OPERATIONAL AMPLIFIERS s LOW POWER CONSUMPTION : 150A/op s OUTPUT VOLTAGE CAN SWING TO GROUND s EXCELLENT PHASE MARGIN ON CAPACITIVE LOADS s STABLE AND LOW OFFSET VOLTAGE s THREE INPUT OFFSET VOLTAGE SELECTIONS DESCRIPTION These devices are low cost, low power dual operational amplifiers designed to operate with single or dual supplies. These operational amplifiers use the ST silicon gate CMOS process allowing an excellent consumption-speed ratio. These series are ideally suited for low consumption applications. Three power consumptions are available allowing to have always the best consumption-speed ratio: N DIP8 (Plastic Package) D SO8 (Plastic Micropackage) P TSSOP8 (Thin Shrink Small Outline Package) u ICC = 10A/amp.: TS27L2 (very low power) u ICC = 150A/amp.: TS27M2 (low power) u ICC = 1mA/amp.: TS272 (standard) These CMOS amplifiers offer very high input impedance and extremely low input currents. The major advantage versus JFET devices is the very low input currents drift with temperature (see figure 2). ORDER CODE Package Part Number Temperature Range N TS27M2C/AC/BC 0C, +70C TS27M2I/AI/BI -40C, +125C TS27M2M/AM/BM -55C, +125C Example : TS27M2ACN * * * D * * * P * * * 1 - Output 1 2 - Inverting Input 1 3 - Non-inverting Input 1 4 - V CC 5 - Non-inverting Input 2 6 - Inverting Input 2 7 - Output 2 8 - V CC + 1 2 3 4 + + 8 7 6 5 PIN CONNECTIONS (top view) N = Dual in Line Package (DIP) D = Small Outline Package (SO) - also available in Tape & Reel (DT) P = Thin Shrink Small Outline Package (TSSOP) - only available in Tape & Reel (PT) November 2001 1/9 TS27M2C,I,M BLOCK DIAGRAM VCC Current source xI Input differential Second stage Output stage Output VCC E E ABSOLUTE MAXIMUM RATINGS Symbol VCC Vid Vi Io Iin Toper Tstg + Parameter Supply Voltage 3) 1) 2) TS27M2C/AC/BC TS27M2I/AI/BI TS27M2M/AM/BM 18 18 -0.3 to 18 30 5 Unit V V V mA mA Differential Input Voltage Input Voltage Output Current for VCC+ 15V Input Current Operating Free-Air Temperature Range Storage Temperature Range 0 to +70 -40 to +125 -65 to +150 -55 to +125 C C 1. All values, except differential voltage are with respect to network ground terminal. 2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. 3. The magnitude of the input and the output voltages must never exceed the magnitude of the positive supply voltage. OPERATING CONDITIONS Symbol VCC+ Vicm Supply Voltage Common Mode Input Voltage Range Parameter Value 3 to 16 0 to VCC+ - 1.5 Unit V V 2/9 VCC T24 T 25 T 26 T6 T8 T27 T5 T 10 T 15 SCHEMATIC DIAGRAM (for 1/2 TS27M2) R2 T28 T1 Input T 18 T2 Input R1 C1 T11 T 12 T17 T7 T 23 T3 Output T19 T4 T16 T9 T 13 T 14 T20 T 22 T21 T29 VCC TS27M2C,I,M 3/9 TS27M2C,I,M ELECTRICAL CHARACTERISTICS VCC+ = +10V, VCC-= 0V, Tamb = +25C (unless otherwise specified) TS27M2C/AC/BC Symbol Parameter Min. Input Offset Voltage VO = 1.4V, Vic = 0V Vio Tmin Tamb Tmax TS27M2C/I/M TS27M2AC/AI/AM TS27M2B/C/I/M TS27M2C/I/M TS27M2AC/AI/AM TS27M2B/C/I/M Typ. 1.1 0.9 0.25 Max. 10 5 2 12 6.5 3 TS27M2I/AI/BI TS27M2M/AM/BM Min. Typ. Max. 10 5 2 12 6.5 3.5 Unit 1.1 0.9 0.25 mV DVio Iio Input Offset Voltage Drift Input Offset Current note 1) Vic = 5V, VO = 5V Tmin Tamb Tmax Input Bias Current - see note 1 Vic = 5V, VO = 5V Tmin Tamb Tmax High Level Output Voltage Vid = 100mV, RL = 100l Tmin Tamb Tmax Low Level Output Voltage Vid = -100mV Large Signal Voltage Gain ViC = 5V, RL = 100k, Vo = 1V to 6V Tmin Tamb Tmax Gain Bandwidth Product Av = 40dB, RL = 100k, CL = 100pF, fin = 100kHz Common Mode Rejection Ratio ViC = 1V to 7.4V, Vo = 1.4V Supply Voltage Rejection Ratio VCC+ = 5V to 10V, Vo = 1.4V Supply Current (per amplifier) Av = 1, no load, Vo = 5V Tmin Tamb Tmax Output Short Circuit Current Vo = 0V, Vid = 100mV Output Sink Current Vo = VCC, Vid = -100mV Slew Rate at Unity Gain RL = 100k, CL = 100pF, Vi = 3 to 7V Phase Margin at Unity Gain Av = 40dB, RL = 100k, CL = 100pF Overshoot Factor Equivalent Input Noise Voltage f = 1kHz, Rs = 100 Channel Separation 65 60 30 20 8.7 8.6 2 1 100 1 150 8.9 8.7 8.5 50 50 30 10 2 1 200 1 300 8.9 V/C pA Iib pA VOH VOL Avd V 50 50 mV V/mV GBP CMR SVR 1 80 80 150 200 250 65 60 1 80 80 150 200 300 MHz dB dB ICC Io Isink SR m KOV en Vo1/Vo2 1. A 60 45 0.6 45 30 38 120 60 45 0.6 45 30 38 120 mA mA V/s Degrees % nV ----------Hz dB Maximum values including unavoidable inaccuracies of the industrial test. 4/9 TS27M2C,I,M TYPICAL CHARACTERISTICS Figure 1 : Supply Current (each amplifier) versus Supply Voltage 200 OUTPUT VOLTAGE, VOH (V) Figure 3b : High Level Output Voltage versus High Level Output Current 20 SUPPLY CURRENT, I CC (A) 150 TAMB = 25 C AV= 1 VO = V / 2 CC 16 12 8 4 0 -50 TAMB = 25 C V ID = 100mV VCC = 16V 100 VCC = 10V 50 0 4 8 12 16 -40 -30 -20 -10 0 SUPPLY VOLTAGE, V CC (V) OUTPUT CURRENT, I OH (mA) Figure 2 : Input Bias Current versus Free Air Temperature 100 INPUT BIAS CURRENT, IIB (pA) Figure 4a : Low Level Output Voltage versus Low Level Output Current 1.0 OUTPUT VOLTAGE, VOL (V) VCC = 10V V i = 5V VCC = 3V 0.8 VCC = 5V 0.6 0.4 0.2 TAMB = 25 C V i = 0.5V VID = -1V 10 1 25 50 75 100 125 TEMPERATURE, TAMB (C) 0 1 2 3 OUTPUT CURRENT, I OL (mA) Figure 3a : High Level Output Voltage versus High Level Output Current 5 4 3 2 1 0 VCC = 3V Figure 4b : Low Level Output Voltage versus Low Level Output Current 3 OUTPUT VOLTAGE, VOL (V) OUTPUT VOLTAGE, VOH (V) TAMB = 25 C V ID = 100mV VCC = 5V VCC = 10V 2 VCC = 16V 1 TAMB = 25 C V i = 0.5V VID = -1V -10 -8 -6 -4 -2 0 0 4 8 12 16 20 OUTPUT CURRENT, I OH (mA) OUTPUT CURRENT, I OL (mA) 5/9 TS27M2C,I,M Figure 5 : Open Loop Frequency Response and Phase Shift Figure 8 : Phase Margin versus Capacitive Load (Degrees) 50 40 GAIN (dB) 30 20 10 0 -10 2 10 PHASE Tamb = 25C VCC+ = 10V R L = 100k C L = 100pF A VCL = 100 10 3 4 80 PHASE (Degrees) GAIN Phase Margin 0 45 90 135 70 T amb = 25C R L = 100k AV=1 VCC = 10V PHASE MARGIN, m 60 Gain Bandwidth Product 6 180 7 50 10 10 5 10 FREQUENCY, f (Hz) 10 40 0 20 40 60 80 CAPACITANCE, C L (pF) 100 Figure 6 : Gain Bandwidth Product versus Supply Voltage GAIN BANDW. PROD., GBP (kHz) 1800 Figure 9 : Slew Rate versus Supply Voltage 0.9 SLEW RATES, SR (V/ s) Tamb = 25C R L = 100k C L = 100pF AV = 1 1400 1000 600 200 0 0.8 0.7 0.6 0.5 0.4 4 T amb = 25C R L = 100k C L = 100pF SR SR 4 8 12 16 SUPPLY VOLTAGE, V CC (V) 6 8 10 12 14 SUPPLY VOLTAGE, V CC (V) 16 Figure 7 : Phase Margin versus Supply Voltage Figure 10 : Input Voltage Noise versus Frequency EQUIVALENT INPUT NOISE VOLTAGE (nV/VHz) 300 PHASE MARGIN, m (Degrees) 50 VCC = 10V Tamb = 25C 200 R S = 100 40 Tamb = 25C R L = 100k C L = 100pF AV = 1 0 4 8 12 SUPPLY VOLTAGE, V CC (V) 16 30 100 20 0 1 100 10 FREQUENCY (Hz) 1000 6/9 TS27M2C,I,M PACKAGE MECHANICAL DATA 8 PINS - PLASTIC DIP Millimeters Dim. Min. A a1 B b b1 D E e e3 e4 F i L Z 0.51 1.15 0.356 0.204 7.95 2.54 7.62 7.62 6.6 5.08 3.81 1.52 Typ. 3.32 1.65 0.55 0.304 10.92 9.75 0.020 0.045 0.014 0.008 0.313 Max. Min. Inches Typ. 0.131 0.065 0.022 0.012 0.430 0.384 0.100 0.300 0.300 0260 0.200 0.150 0.060 Max. 3.18 0.125 7/9 TS27M2C,I,M PACKAGE MECHANICAL DATA 8 PINS - PLASTIC MICROPACKAGE (SO) L C a3 b1 c1 a2 b e3 A s E D M 8 5 F 1 4 Millimeters Dim. Min. A a1 a2 a3 b b1 C c1 D E e e3 F L M S 0.1 0.65 0.35 0.19 0.25 4.8 5.8 1.27 3.81 3.8 0.4 4.0 1.27 0.6 8 (max.) 0.150 0.016 Typ. Max. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 5.0 6.2 0.189 0.228 Min. 0.004 0.026 0.014 0.007 0.010 a1 Inches Typ. Max. 0.069 0.010 0.065 0.033 0.019 0.010 0.020 0.197 0.244 0.050 0.150 0.157 0.050 0.024 8/9 TS27M2C,I,M PACKAGE MECHANICAL DATA 8 PINS - THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP) k c 0.25mm .010 inch GAGE PLANE L1 L L L1 E1 SEATING PLANE A A2 A1 5 D b 8 8 C E 4 e 5 PIN 1 IDENTIFICATION Millimeters Dim. Min. A A1 A2 b c D E E1 e k l L L1 0.05 0.80 0.19 0.09 2.90 4.30 0 0.50 0.45 Typ. Max. 1.20 0.15 1.05 0.30 0.20 3.10 4.50 8 0.75 0.75 Min. 0.01 0.031 0.007 0.003 0.114 0.169 0 0.09 0.018 1 4 1 Inches Typ. Max. 0.05 0.006 0.041 0.15 0.012 0.122 0.177 8 0.030 0.030 1.00 0.039 3.00 6.40 4.40 0.65 0.60 0.600 1.000 0.118 0.252 0.173 0.025 0.0236 0.024 0.039 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States (c) http://www.st.com 9/9 |
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